ZU48/47/43/28/27/25DR RFSoC System on Module

Processing System (PS)

• • Quad Arm Cortex-A53 @1.3GHz
  • Dual Cortex-R5F @533MHz

Programming Logic (PL)

• • Up to 930K Logic cells & 425K LUTs
  • PL GTY High Speed Transceivers x 16 @28.21 Gbps

• • HP Bank IOs – up to 70LVDS/140SE
  • HD Bank IOs – up to 12LVDS/24SE

• • 16 x PL-GTY High Speed Transceivers (up to 28.21Gbps)
  • PL Control Signal

From PS Block

• • Gigabit Ethernet x 1 Port (through On-SOM Gigabit Ethernet PHY)
  • USB 2.0 OTG x 1 (through On-SOM USB2.0 transceiver)
  • SPI/QSPI X 1 Port (Optional)
  • CAN x 1, I2C x 2, SD x 1
  • Debug UART x 1, Data UART x 1, PS JTAG
  • RGMII Interface or ULPI Interface x 1
  • PS -GTR High speed Transceivers x 4 (upto 6Gbps)
  • PS-Control Signals
  • SYSMON(Optional)

Clock signals

• • 10MHz Clock IN, 1 PPS IN
  • 10 MHz Clock out, 1 PPS Clock Out
  • Synthesized Clock out from Clock synthesizer
  • Synthesized Clock into Clock Synthesizer

• Power Input: 12V through B2B Connector2
• Form Factor: 82mm x 100mm (BRYN)
• BSP Support: Linux BSP- Petalinux/vivado 2022.2
• Operating Temperature: -40°C to +85°C (Industrial)
• Environment Specification: REACH & RoHS3 Compliant
• Compliance: CE*